Computer Organization
What is Computer Organization?
Central Processing Unit; the primary component of a computer that performs most of the processing.
Key formula / rule: Average Memory Access Time (AMAT)
Key points
- Understand the basic structure and function of a computer system.
- Analyze the design and operation of the CPU, memory, and I/O subsystems.
- Explain the concepts of instruction set architecture and microarchitecture.
- Describe the principles of pipelining and its associated hazards.
Common exam trap
Confusing Computer Architecture with Computer Organization (Architecture is the 'what', Organization is the 'how').
Definitions
- Term
CPU
- Meaning
Central Processing Unit; the primary component of a computer that performs most of the processing.
- Term
Memory Hierarchy
- Meaning
A structure that uses a variety of storage devices in a hierarchical order at different cost, speed, and capacity. Common levels include registers, cache, main memory, and secondary storage.
- Term
Pipelining
- Meaning
A technique used in CPUs to execute multiple instructions simultaneously by breaking down instruction execution into stages and overlapping the execution of different instructions.
- Term
Instruction Set Architecture (ISA)
- Meaning
The part of the processor that is visible to the programmer or compiler; it includes the instruction set, registers, memory addressing modes, and data types.
- Term
Microarchitecture
- Meaning
The specific implementation of an ISA; it defines how the ISA is realized in hardware, including the design of the datapath and control unit.
- Term
Cache Memory
- Meaning
A small, fast memory located between the CPU and main memory, used to store frequently accessed data and instructions to reduce access time.
- Term
Direct Memory Access (DMA)
- Meaning
A feature that allows certain hardware subsystems to access main system memory (RAM) independently of the CPU, for faster data transfer.
Learning objectives
Understand the basic structure and function of a computer system.
Analyze the design and operation of the CPU, memory, and I/O subsystems.
Explain the concepts of instruction set architecture and microarchitecture.
Describe the principles of pipelining and its associated hazards.
Evaluate the role of memory hierarchy in system performance.
Understand different I/O techniques.
Formulae
- Name
Average Memory Access Time (AMAT)
- Note
Hit Time is the time to access data in cache. Miss Rate is the probability of a cache miss. Miss Penalty is the time to retrieve data from a lower memory level.
- Expression
AMAT = Hit Time + Miss Rate × Miss Penalty
- Name
Cache Hit Rate
- Note
Measures the effectiveness of the cache.
- Expression
Hit Rate = Number of Hits / Total Accesses
- Name
Cache Miss Rate
- Note
Measures the ineffectiveness of the cache.
- Expression
Miss Rate = Number of Misses / Total Accesses = 1 - Hit Rate
- Name
Effective Access Time (with Pipelining)
- Note
CPI: Cycles Per Instruction. Pipeline Speedup is the ratio of non-pipelined execution time to pipelined execution time.
- Expression
Effective Access Time = (Instruction Count × CPI × Clock Cycle Time) / Pipeline Speedup
Prerequisites
Digital Logic Design
Basic Electronics
Number Systems and Data Representation
Common mistakes
Confusing Computer Architecture with Computer Organization (Architecture is the 'what', Organization is the 'how').
Underestimating the impact of memory hierarchy on performance.
Incorrectly analyzing pipeline stalls and hazards.
Misunderstanding interrupt handling and DMA operations.
Errors in binary arithmetic operations.
Keywords
CPU
Memory
I/O
Pipelining
Cache
ISA
Microarchitecture
Control Unit
ALU
Registers
DMA
Von Neumann
Harvard
Practice preview
What is the correct sequence of the basic instruction cycle stages in a typical processor?…
easy
A processor has a clock rate of 2 GHz and a CPI (Cycles Per Instruction) of 1.2 without considering memory stalls. The instruction mix is 30% loads/stores and 70% other instructions. If the miss rate for the data cache i…
hard
Which of the following is NOT a primary component of a Central Processing Unit (CPU)?…
easy